1. Field of the Invention:
The present invention relates to a current-mode logic circuit, and particularly to a current-mode logic circuit made up of a MOS transistor that performs wave shaping.
2. Description of the Related Art:
This type of current-mode logic circuit has conventionally been used for operating logic circuits composed of MOS transistors at low power voltage and high speed.
As an example, FIG. 1 shows a circuit diagram of one type of current-mode logic circuit of the prior art.
This current-mode logic circuit is an inverter/buffer circuit taking MOS transistors M11 and M12 as a differential logic pair. The gate electrode of MOS transistor M11 is connected to input line 11, the source electrode is connected to constant-current power source I11, and the drain electrode is connected to output line 10 and load element R11. The gate electrode of MOS transistor M12 is connected to input line 11B, the source electrode is connected to constant-current power source I11, and the drain electrode is connected to output line 10B and load element R12.
The operation of the current-mode logic circuit will next be explained with reference to FIG. 1. If for example, an input signal and its reverse signal are inputted to current-mode logic circuit from input lines 11 and 11B, respectively, and the input signal of input line 11 changes from high level to low level, MOS transistor M11 switches from a conductive state to a nonconductive state and MOS transistor M12 switches from a nonconductive state to a conductive state, the path of the constant current switches, a voltage drop occurs at load element R12 without a voltage drop occurring at load element R11, the signal of output line 10 changes to high level, and the signal at output line 10B changes to low level.
FIG. 2 shows a circuit diagram of another example of a current-mode logic circuit of the prior art. This current-mode logic circuit selects and outputs one signal from among N input signals. Instead of the differential logic pair composed of MOS transistors M11 and M12 explained in FIG. 1, this current-mode logic circuit has a configuration including a series-parallel connected differential logic pair made up of N sets of MOS transistors M211, M212; M221, M222; . . . M2N1, M2N2 that amplify N sets of input signals and their reverse signals inputted to N sets of input lines 211, 211B; 221, 221B; . . . 2N1, 2N1B; and NMOS transistors M213, M223, . . . M2N3 having gate electrodes connected to N input lines 213, 223, . . . 2N3, respectively, that select whether or not current is to be supplied to the N sets of MOS transistors.
If the electrical power consumption of the circuit of FIG. 2 is designed to be the same as the electrical power consumption of the circuit of FIG. 1, the values of constant-current source I21 as well as load elements R21 and R22 are identical to the values of constant-current source I11 as well as the load elements R11 and R12 of FIG. 1.
The operation of this current-mode logic circuit will next be explained with reference to FIG. 2. For example, if only the input signal of input line 213 among the N input lines 213, 223, . . . , 2N3 of this current-mode logic circuit is of high level, current is supplied only to MOS transistors M211 and M212, and consequently, the signals of input lines 211 and 211B are amplified and output signals are outputted to output lines 20 and 20B.
In the case of the current-mode logic circuit composed of MOS transistors according to the above-described prior art, in cases where the amplitude of an output signal is decreased through noise due to logic circuit switching, power voltage fluctuation, or changes in manufacturing processes, logic circuit designers have been compelled to supplement circuits by increasing the number of gate wafer sections (the number of logic circuit wafer sections) concatenating to shape the wave of output signals, or increase the transistor dimensions to increase gain of each individual gate (individual logic circuit). Consequently, when designing integrated circuits having large gain and resistance to the influence of noise or power source fluctuations, because integrated circuit density dropped within the same area, logic circuit designers found it necessary to shift other necessary functions to separate integrated circuits. This has resulted in a trend toward integrated circuits of increased area and increased cost.